PCB Layout Design Guide for Analog Applications.pdf

Freescale Semiconductor

Application Note

AN3962

Rev. 2.0, 8/2010

PCB Layout Design Guide for Analog

Applications

By: Edward Lee, Rafael Garcia Mora

Purpose

Contents

1 Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

PCB Layout design is essential to better performance,

reliability and manufacturability. Malfunctions from poor heat

dissipation and noise, which may hurt the system stability,

have become an increasing problem, and may therefore

generate more failures and reliability malfunctions in

production lines.

In this document, several considerations and guidelines for

PCB layout design are discussed for better performance,

reliability, and manufacturability.

2 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 General Design Guide . . . . . . . . . . . . . . . . . . 2

4 Power ground seperation (Noise isolation). 9

5 Thermal Considerations . . . . . . . . . . . . . . . 12

6 References . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Scope

This document discusses basics for layout, regulations,

methods of noise isolation, and thermal considerations.

General Design Guides

Producibility is related to the complexity of the design, and the specific printed board or printed board assembly.

There are three producibility levels:

• Class 1: General Electronic Products

• Class 2: Dedicated Service Electronic Products

• Class 3: High Reliability Electronic Product

Class 1 products include consumer products, computers and their peripherals, and general military hardware. Class

2 products include communication equipment, sophisticated business machines, instruments and military

equipment. Class 3 products include the equipment for commercial and military applications, where continued

performance, or performance on demand is critical.

The complexity levels are specified as:

• Level A: General Design Complexity (Preferred)

• Level B: Moderate Design Complexity (Standard)

• Level C: High Design Complexity (Reduced Producibility)

Table 1 shows the general layout guidance for different classes. (Class A: simple single level consumer products;

Class B: complex and multilevel general industrial products; Class C: high reliability medical and military products)

Table 1. Composite Board Design Guidance

Guidance

Class A

Class B

Class C

Number of conductor layers (Maximum)

6.0

Thickness of the total board (Maximum)

2.5 mm (0.100 in)

3.8 mm (0.150 in)

5.0 mm (0.200 in)

Board thickness tolerance

± 10% above nominal

or 0.18 mm (0.007 in),

whichever is greater

± 10% above nominal

or 0.18 mm (0.007 in),

whichever is greater

± 10% above nominal

or 0.18 mm (0.007 in),

whichever is greater

Thickness of dielectric (Minimum)

0.2 mm (0.008 in)

0.15 mm (0.006 in)

0.1 mm (0.004 in)

Minimum conductor width

Internal

External

0.3 mm (0.012 in)

0.4 mm (0.016 in)

0.2 mm (0.008 in)

0.25 mm (0.010 in)

0.1 mm (0.004 in)

Conductor width tolerance

Unplated 2.0 oz/ft 2

+0.1 mm (0.004 in)

-0.15 mm (0.006 in)

+0.05 mm (0.002 in)

-0.08 mm (0.003 in)

+0.05 mm (0.002 in)

-0.13 mm (0.005 in)

+0.025 mm (0.001 in)

-0.05 mm (0.002 in)

+0.025 mm (0.001 in)

-0.08 mm (0.003 in)

+0.025 mm (0.001 in)

-0.025 mm (0.001 in)

Unplated 1.0 oz/ft 2

Protective plated

(metallic etch resist over 2.0 oz/ft 2 copper)

+0.20 mm (0.008 in)

-0.15 mm (0.006 in)

+0.10 mm (0.004 in)

-0.10 mm (0.004 in)

+0.05 mm (0.002 in)

-0.05 mm (0.002 in)

Minimum conductor spacing

0.3 mm (0.012 in)

0.2 mm (0.008 in)

0.1 mm (0.004 in)

Annular ring plated-through hole (minimum)

Internal

External

0.20 mm (0.008 in)

0.25 mm (0.010 in)

0.13 mm (0.005 in)

0.20 mm (0.008 in)

0.05 mm (0.002 in)

0.13 mm (0.005 in)

Feature location tolerance (master pattern, material

movement, and registration)

(diameter of true position)

Up to 300 mm (12.0 in)

Up to 450 mm (18.0 in)

Up to 600 mm (24.0 in)

0.85 mm (0.034 in)

1.0 mm (0.040 in)

1.15 mm (0.046 in)

0.55 mm (0.022 in)

0.60 mm (0.024 in)

0.85 mm (0.034 in)

0.30 mm (0,012 in)

0.45 mm (0.018 in)

0.55 mm (0.022 in)

PCB Layout Design Guide for Analog Applications, Rev. 2.0

Freescale Semiconductor

General Design Guides

Table 1. Composite Board Design Guidance

Guidance

Class A

Class B

Class C

Master pattern accuracy

•

Feature location (diameter of true position)

Up to 300 mm (12.0 in)

Up to 450 mm (18.0 in)

Up to 600 mm (24.0 in)

0.10 mm (0.004 in)

0.13 mm (0.005 in)

0.15 mm (0.006 in)

0.08 mm (0.003 in)

0.10 mm (0.004 in)

0.13 mm (0.005 in)

0.05 mm (0.002 in)

0.08 mm (0.003 in)

0.10 mm (0.004 in)

•

Feature size tolerance

0.08 mm (0.003 in)

0.05 mm (0.002 in)

0.025 mm (0.001 in)

Board thickness to plated hole diameter (maximum)

3:1

6:1

10:1

Hole location tolerance (diameter of true position)

Up to 300 mm (12.0 in)

Up to 450 mm (18.0 in)

Up to 600 mm (24.0 in)

0.40 mm (0.016 in)

0.50 mm (0.020 in)

0.6 mm (0.024 in)

0.30 mm (0.012 in)

0.40 mm (0.016 in)

0.50 mm (0.020 in)

0.10 mm (0.004 in)

0.20 mm (0.008 in)

0.30 mm (0.012 in)

Unplated hole diameter tolerance (unilateral)

0.0 - 0.8 mm (0 - 0.032 in)

0.85 - 1.6 mm (0.033 - 0.063 in)

1.65 - 5.0 mm (0.064 -0.200 in)

0.16 mm (0.006 in)

0.20 mm (0.008 in)

0.30 mm (0.012 in)

0.10 mm (0.004 in)

0.16 mm (0.008 in)

0.20 mm (0.008 in)

0.06 mm (0.002 in)

0.10 mm (0.004 in)

0.16 mm (0.006 in)

Plated hole diameter tolerance (unilateral) for

minimum hole diameter maximum board thickness

ratios greater than 1:4 add 0.05 mm(0.002 in)

0.0 - 0.8 mm (0 - 0.032 in)

0.85 - 1.6 mm (0.033 - 0.063 in)

1.65 - 5.0 mm (0.064 -0.200 in)

0.20 mm (0.008 in)

0.30 mm (0.012 in)

0.40 mm (0.016 in)

0.16 mm (0.006 in)

0.20 mm (0.008 in)

0.30 mm (0.012 in)

0.10 mm (0.004 in)

0.20 mm (0.008 in)

Conductor to edge of board (minimum)

Internal layer

External layer

2.5 mm (0.100 in)

1.25 mm (0.050 in)

2.5 mm (0.100 in)

0.65 mm (0.025 in)

2.5 mm (0.100 in)

Notes

1.The number of conductor layers should be the optimum for the required board function and good producibility.

When considering the producibility of the PCB, there are certain guidelines for layout. For example, when drilling

and plating through holes, there are limitations related to the hole size. Table 2 , describes the recommended

minimum hole size for plated through holes.

Table 2. Minimum Hole Size for Plated-Through Holes

Board Thickness

Class 1

Class 2

Class 3

<1.0 mm(0.040 in)

Level C

0.15 mm

(0.006 in)

Level C

0.2 mm

(0.008 in)

Level C

0.25 mm

(0.010 in)

1.0 mm -> 1.6 mm

(0.040 -> 0.063 in)

Level C

0.2 mm

(0.008 in)

Level C

0.25 mm

(0.010 in)

Level B

0.3 mm

(0.012 in)

1.6 mm -> 2.0 mm

(0.053 -> 0.080 in)

Level C

0.3 mm

(0.012 in)

Level B

0.4 mm

(0,016 in)

Level B

0.5 mm

(0.020 in)

>2.0 mm(0.080 in)

Level B

0.4 mm

(0.016 in)

Level A

0.5 mm

(0.020 in)

Level A

0.6 mm

(0.024 in)

Notes: If copper in the hole is greater than 0.03 mm(0.0012 in), the hole size can be reduced by one class

PCB Layout Design Guide for Analog Applications, Rev. 2.0

Freescale Semiconductor

General Design Guides

The component mounting of the layout also effects the reliability and the producibility of the board, so It is important

to consider PCB flexing. To avoid cracking when the PCB is flexed, it’s advantageous to place the components in a

vertical direction of the longer direction of the PCB. See Figure 1 .

Preferred

Poor

Figure 1. Component Mounting Direction

3.1 Minimum Trace Width

To calculate what minimum width is required to handle a certain amount of current, it requires several parameters,

including the operating temp range, maximum current which will flow through the trace, copper thickness, etc. There

is simple rule of thumb, which can be applied for most of the applications. For 1.0 oz/ft 2 of copper thickness, in most

of the commercial applications, 1.0 mm/A is required as a minimum trace width.

PCB Layout Design Guide for Analog Applications, Rev. 2.0

Freescale Semiconductor

General Design Guides

3.2 Clearance in Primary Circuits

When considering the insulation distance between two traces (or components), it is important to understand the

difference of clearance and the creepage distance. Figure 2 shows the definition of these two distances.

Creepage Distance

B Point

A Point

Clearance Distance

Figure 2. Clearance and Creepage Distance

Clearance distance is defined as the shortest distance through the air between two conductive elements. The

creepage distence is defined as the shortest distance on the surface of an insulating material between two

conductive elements. As shown in Figure 2 , with a slit between two conductive points, the creepage distance is

increased by detouring the slit.

Clearance in primary circuits must comply with the minimum dimension in Table 3 , and where appropriate, Table 4 .

The relevant conditions in these tables must be considered.

Table 3. Minimum Clearances for Insulation in Primary Circuits, and

Between Primary and Secondary Circuits (mm)

Circuits subject to Installation Category II

Nominal mains

supply voltage

> 300 V

≤ 600 V

(Transient rating

400 V)

Nominal mains supply voltage

> 150 V

≤ 300 V

(Transient rating 2500 V)

Insulation working voltage

up to and including

Nominal mains supply voltage

≤ 150 V

(Transient rating 1500 V)

Pollution degrees

1 and 2

Pollution

degree 3

Pollution degrees

1 and 2

Pollution

degree 3

Pollution degrees

1, 2, and 3

V rms

(sinusoidal)

V peak or dc

B/S

0.4

1.0

(0.5)

1.0

(0.5)

2.0

(1.0)

2.0

(1.0)

0.8

1.3

(0.8)

1.3

(0.8)

2.6

(1.6)

2.6

(1.6)

1.0

2.0

(1.5)

2.0

(1.5)

4.0

(3.0)

4.0

(3.0)

1.3

2.0

(1.5)

2.0

(1.5)

4.0

(3.0)

4.0

(3.0)

2.0

3.2

(3.0)

3.2

(3.0)

6.4

(6.0)

6.4

(6.0)

210

150

0.5

0.8

1.4

1.5

2.0

420

300

Op 1.5 B/S 2.0(1.5) R 4.0(3.0)

2.5

3.2

(3.0)

6.4

(6.0)

840

600

Op 3.0 B/S 3.2(3.0) R6.4(6.0)

1,400

1.000

Op/B/S 4.2 R 6.4

PCB Layout Design Guide for Analog Applications, Rev. 2.0

Freescale Semiconductor

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