Lenovo_Ideapad_Y450_(KL1).pdf
(
2574 KB
)
Pobierz
1
2
3
4
5
6
7
8
KL1 BLOCK DIAGRAM
01
PCB STACK UP
8L
LAYER 1 : TOP
CPU (Penryn)
478P (uPGA)/35W
LAYER 2 : SGND1
CPU THERMAL SENSOR
PAGE 5
A
A
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : VCC
14.
318
MHz
CPU CORE(MAX17021)
PAGE 41
PAGE 4,5
CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK#
DREFSSCLK,DREFSSCLK#
CLOCK GEN
LAYER 6 : IN3
ICS9LPRS365BGLFT
FSB 667/800/1066
LAYER 7 : SGND2
LAYER 8 : BOT
PAGE 3
VCCP +1.05V AND GMCH
+1.5V(RT8204)
PCI-Express
1X
Level-Shifter(PS8101)
PAGE 22
PAGE 28
GDDR3 X 2
(256MB)
NORTH BRIDGE
PAGE 18
2
7MH
z
FBA
GDDR3 X 2
DDRIII-SODIMM1
DDRIII 800/1066 MHz
FBC
(256MB)
PAGE 19
HDMI CONN
DDR III (TPS51116REGR)
1.5VSUS/SMDDR_VTERM
/SMDDR_VREF
PAGE 11
Cantiga
NVIDIA
PAGE 22
PCI-Express
16X
B
B
PAGE 39
DDRIII-SODIMM2
DDRIII 800/1066 MHz
N10M-GS1(64bit)
N10P-GE1(128bit)
CRT CONN
VGACORE(OZ8119)
PAGE 42
PAGE 20
PAGE 12
Single link
LCD CONN
PAGE 6~10
PAGE 1
3
~19
PAGE 21
3
2.7
68KHz
DMI LINK
NBSRCCLK, NBSRCCLK#
USB2.0
SATA0 150MB
SATA - HDD
0,1,8
9
4
2
6,10,11
PAGE 35
SOUTH BRIDGE
USB2.0 Ports
X3
USB+eSATA Port
X1
BlueTooth
PAGE 36
CCD Module
PAGE 37
Mini PCI-E Card X 2
Express Card
PAGE 33,36
PAGE 32
PAGE 32
SATA1 150MB
SATA - CD-ROM
PAGE 35
ICH-9M
PCI-E
SATA5 150MB
C
C
USB+eSATA
PAGE 32
X2
X1
X1
X1
Azalia
Mini PCI-E Card
LAN
Express Card
Card Reader
PAGE 23,24,25,26
(WLAN/ WWAN)
BCM5784M
JMB380
AUDIO CODEC
(10/100/1G LAN)
(NEW CARD)
SYSTEM POWER(ISL6237)
PAGE 40
LPC
32.
768
KHz
ALC269Q-GR
P
AGE 27
PAGE 33
PAG
E
29,30
PAGE 36
P
A
GE 31
24.576MHz
EC
25MHz
Touch Pad
PAGE 36
SYSTEM CHARGER(ISL6251A)
PAGE 28
RJ45 CONN
IT8512E
1394 CONN
6-IN-1 Card
Reader CONN
PAGE 30
Keyboard
PAGE 37
PAGE
3
4
PAGE 27
PAGE 28
D
D
CIR
Digital MIC
Audio Jack
Head-Phone Jack
+ SPDIF
(Internal MIC)
(External MIC)
PAGE 34
PAGE 31
PAGE 31
PAGE 31
FAN
SPI BIOS
PROJECT : KL1
Quanta Computer Inc
.
Rev
PROJECT : KL1
Quanta Computer Inc.
Rev
PROJECT : KL1
Quanta Computer Inc.
Rev
PAGE 37
PAGE 34
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
BLOCK DIA
G
RAM
BLOCK DIAGRAM
BLOCK DIAGRAM
A1A
A1A
A1A
Date:
Date:
Date:
Friday, March 06, 2009
Friday, March 06, 2009
Friday, March 06, 2009
Sheet
Sheet
Sheet
1
1
1
of
of
of
43
43
43
1
2
3
4
5
6
7
8
5
4
3
2
1
02
Board Stack up Description
PCB Layers
Voltage Rails
Layer 1
TOP
Voltage Rails
ON S0~S2
ON S3
ON S4
ON S5
Control signal
Layer 2
GND
VCC_CORE
V
VRON
D
D
+1.5V
+1.05V
V
MAINON
Layer 3
IN1
V
MAINON
Layer 4
IN2
5V_S5/3V_S5
V
V
V
V
S5_ON
SVCC
Layer 5
Layer 6
IN3
5VSUS/3VSUS/1.5VSUS
V
V
SUSON
Layer 7
GND
SMDDR_VTERM/+3V/+5V/+15V/+1.8V
V
MAINON
Layer 8
BOTTOM
+VGACORE/+VGA1.1V
V
MAINON
LANVCC
V
V
LAN_ON
Power On Sequencing Timing Diagram
3VPCU
V
V
V
V
VL
5VPCU
V
V
V
V
VL
VID
VRON
Tsft_sta
r
_vcc
Vboot
Vid
VCC_CORE
Tboot
C
C
Tboot-vid-tr
CPU_UP
Tcpu_up
Vccp
Vccp_UP
Tvccp_up
Vccgmch
ACIN POWER ON TIMING
GMCHPWRGD
Tgmch_pwrgd
ACIN
CLK_ENABLE#
5VPCU/3VPCU
IMVP6_PWRGD
Tcpu_pwrgd
NBSWON#
From IT8512E
DNBSWON#
To ICH9-M
From IT8512E
Penryn Power-up Timing Specifications
S5_ON
To ICH9-M
Td
RSMRST#
B
RESET#
From ICH9-M
B
SUSB#,SUSC#
From IT8512E
SUSON
BCLK
From IT8512E
MAINON
Tc
VSUS,VCC
Te
PWRGOOD
+1.5V/+1.05V
VRON
Tf
Ta
Tb
VCC_CORE
VCC
Vcc,boot
CLK_EN#
To clock generator
VID[6:0]
9
9ms < t 214
PWROK
To GMCH/other PCI device
PLTRST#\PCIRST#
A
A
+1.05V
PROJECT : KL1
Quanta Computer Inc
Rev
PROJECT : KL1
Quanta Computer Inc
Rev
PROJECT : KL1
Quanta Computer Inc
Rev
Ta=VCC and VCCP asseration to VID[6:0] vaild
Tb=VID[6:0] stable to VCC vaild
Tc=BCLK stable to PWRGOOD assertion
Td=PWRGOOD to RESET# de-assertion time
Te=Vcc,boot vaild to PWRGOOD assertion time
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
SYSTEM IN
F
ORMATION
SYSTEM INFORMATION
SYSTEM INFORMATION
A1A
A1A
A1A
Date:
Date:
Date:
Friday, March 06, 2009
Friday, March 06, 2009
Friday, March 06, 2009
Sheet
Sheet
Sheet
2
2
2
of
of
of
43
43
43
5
4
3
2
1
1
2
3
4
5
6
7
8
03
+3V
RP28
RP28
4P2R-S-0@EV
4P2R-S-0@EV
R_DOT96
2
4
1
3
C
LK_PCIE_VGA (13)
L67
HI0805R800R-00
R_DOT96#
CLK_PCIE_VGA# (13)
1
2
C713
10U/6.3V_8
C706
.1U/10V_4
C373
.1U/10V_4
C705
.1U/10V_4
C372
.1U/10V_4
C375
.1U/10V_4
RP9
RP9
4P2R-S-33@EV
4P2R-S-33@EV
R_DREFSSCLK
4
3
27M_NONSS (15)
27M_SS (15)
R_DREFSSCLK#
2
1
A
L64
HI0805R800R-00
A
1
2
U34
U34
+CK_VDD_MAIN
CLK_CPU_BCLK
16
CPUCLKT0
54
VDDPLL3
C
LK_CPU_BCLK (4)
C710
10U/6.3V_8
C703
.1U/10V_4
CLK_CPU_BCLK#
9
CPUCLKC0
53
2
VDD48
CLK_CPU_BCLK# (4)
CK505
CK505
61
VDDPCI
51
CLK_MCH_BCLK
C
LK_MCH_BCLK (6)
VDDREF
CPUCLKT1
CLK_MCH_BCLK#
39
CPUCLKC1
50
VDDSRC
CLK_MCH_BCLK# (6)
VDDCPU
C-TEST DEL RP32
55
VDDCPU
CPU_ITP
CPUT2_ITP/SRCT8
47
C
LK_PCIE_MINI_C (33)
+CK_VDD_MAIN2
CPU_ITP#
12
CPUT2_ITP/SRCC8
46
VDD96I/O
CLK_PCIE_MINI_C# (33)
20
VDDPLL3I/O
L65
HI0805R800R-00
26
DOTT_96/SRCT0
13
DOTC_96/SRCC0
14
R_DOT96
RP10
RP10
4
3
*4P2R-S-0@IV
*4P2R-S-0@IV
D
REFCLK (7)
VDDSRCI/O
R_DOT96#
1
2
45
2
1
DREFCLK# (7)
VDDSRCI/O
36
VDDSRCI/O
R_DREFSSCLK
RP29
RP29
*4P2R-S-0@IV
*4P2R-S-0@IV
27MHz_Nonss/SRCCLK1/SE1
17
2
4
1
3
D
REFSSCLK (7)
DREFSSCLK# (7)
R_DREFSSCLK#
49
18
VDDCPU_IO
27Mhz_ss/SRCCLC1/SE2
C711
10U/6.3V_8
C708
.1U/10V_4
C704
.1U/10V_4
C707
.1U/10V_4
C377
.1U/10V_4
C376
.1U/10V_4
C374
.1U/10V_4
48
NC
SRCCLKT2/SATACL
21
SRCCLKC2/SATACL
22
SRCCLKT3/CR#_C
24
SRCCLKC3/CR#_D
25
SRCCLKT4
27
SRCCLKC4
28
PCI_STOP#
38
CPU_STOP#
37
SRCCLKT6
41
SRCCLKC6
40
SRCCLKT7/CR#_F
44
SRCCLKC7/CR#_E
43
SRCCLKT9
30
SRCCLKC9
31
SRCCLKT10
34
SRCCLKC10
35
SRCCLKT11/CR#_H
33
SRCCLKC11/CR#_G
32
CLK_PCIE_SATA
C
LK_PCIE_SATA (23)
CLK_PCIE_SATA#
CLK_PCIE_SATA# (23)
CG_XIN
60
X1
CG_XOUT
CLK_PCIE_CARD
CLK_PCIE_CARD#
59
X2
C
LK_PCIE_CARD (27)
CLK_PCIE_CARD# (27)
+3V
CLK_PCIE_LAN
CLK_PCIE_LAN#
C
LK_PCIE_LAN (29)
CLK_PCIE_LAN# (29)
PM_STPPCI#
56
(25)
CK_PWG
PM_STPPCI# (25)
CK_PWRGD/PD#
CLK_BSEL1
FSB
PM_STPCPU#
57
Y
4
Y4
PM_STPCPU# (25)
FSLB/TEST_MODE
B
B
CG_XIN
CG_XOUT
CLK_PCIE_ICH
R541
*10K_4
1
2
C-TEST DEL R574
CLK_PCIE_ICH (24)
CLK_PCIE_ICH#
CLK_PCIE_ICH# (24)
14.318MHZ+/- 10ppm
14.318MHZ+/- 10ppm
CGCLK_SMB
CLK_PCIE_MINI
64
SCLK
CLK_PCIE_MINI (33)
(11,12,25,33,36)
CGCLK_SMB
TME
C701
27P/50V/NPO_4
C692
27P/50V/NPO_4
CGDAT_SMB
63
CLK_PCIE_MINI#
CLK_PCIE_MINI# (33)
SDATA
(11,12,25,33,36)
CGDAT_SMB
C-TEST DEL RP30 & RP31
RSRC_MCH
CLK_PCIE_3GPLL (7)
CLK_PCIE_3GPLL# (7)
RSRC_MCH#
15
GND
19
GND
R549
4.7K_4
CLK_PCIE_NEW
11
GND48
CLK_PCIE_NEW_C (36)
52
CLK_PCIE_NEW#
CLK_PCIE_NEW_C# (36)
GNDCPU
8
GNDPCI
NEW-CARD_CLK_REQ#_R
58
R563
R563
475/F_4
475/F_4
GNDREF
NEW-CARD_CLK_REQ# (36)
CLK_MCH_OE# (7)
CLK_3GPLLREQ#_R
R539
R539
475/F_4
475/F_4
23
GNDSRC
29
GNDSRC
42
GNDSRC
PCICLK0/CR#_A
1
PCICLK1/CR#_B
3
PCICLK2/TME
4
PCICLK3
5
PCICLK4/27_SELECT
6
PCLK_MINI_LPC
R552
R552
33_4
33_4
PCLK_LPC_DEBUG (33)
PCIE_LANREQ#_R
R551
R551
475/F_4
475/F_4
PCIE_LANREQ# (29)
TME
R_PCLK_8512
FCTSEL1
0=overclocking
of CPU and
SRC Allowed
R537
R537
33_4
33_4
PCLK_LPC_8512 (34)
ITP_EN
R542
R542
33_4
33_4
1 = overclocking
of CPU and SRC
not Allowed
PCI_F5/ITP_EN
7
USB_48MHZ/FSLA
P
CLK_ICH (24)
R546
R546
22/F_4
22/F_4
CLK_48M_USB (25)
10
FSA
R547
R547
2.2K_4
2.2K_4
CLK_BSEL0
FSC
R567
R567
10K_4
10K_4
CLK_BSEL2
62
R568
R568
22/F_4
22/F_4
CLK_14M_ICH (25)
FSLC/TST_SL/REF
C
C
GCLK_SEL = FCTSEL1
FCTSEL1
(PIN13)
ICS9LPRS365BGLFT/SLG8SP512T
ICS9LPRS365BGLFT/SLG8SP512T
+3V
PIN13
PIN14
PIN17
PIN18
CK505
TSSOP64
0=UMA
DOT96T
DOT96C
SRCT1/LCDT_100
SRCT1/LCDT_100
+3V
Realtek
RTM875T-606-VD-GRT
AL000875K00
R530
10K_4@EV
1 = External
VGA
ICS
ICS9LPRS365BGLFT
ALPRS365K13
NEW-CARD_CLK_REQ#
R559
R559
2
1
10K_4
10K_4
SRCT0
SRCC0
27Mout-NSS
27Mout-SS
FCTSEL1
CLK_MCH_OE#
R548
R548
10K_4
10K_4
2
1
CPU Clock select
R531
*10K_4@IV
FSC FSB
FSA CPU SRC PCI
1
0
1
100
100
100
100
100
33
C687
C687
*27P/50V_4
*27P/50V_4
PCLK_LPC_8512
CLK_BSEL0
(4,7)
CPU_BSEL0
MCH_BSEL0 (4,7)
0
0
0
0
0
1
133
33
33
33
33
C685
C685
*27P/50V_4
*27P/50V_4
PCLK_ICH
PCLK_LPC_DEBUG
C-TEST DEL R533
SOVT DEL R528
0=UMA
1
1
166
200
266
333
400
C688
C688
*27P/50V_4
*27P/50V_4
1 = External VGA
R538
R538
*1K/F_4
*1K/F_4
1
0
C686
C686
27P/50V_4
27P/50V_4
CLK_48M_USB
CLK_BSEL1
(4,7)
CPU_BSEL1
MCH_BSEL1 (4,7)
0
0
0
100
C709
C709
*27P/50V_4
*27P/50V_4
CLK_14M_ICH
C-TEST DEL R580
SOVT DEL R573
1
0
100
100
100
33
EMI
ITP_EN
R581
R581
*1K/F_4
*1K/F_4
+1.05V
D
1
1
0
33
33
D
CLK_BSEL2
(4,7)
CPU_BSEL2
MCH_BSEL2 (4,7)
1
1
1
R
SVD
R550
10K_4
C-TEST DEL R569
SOVT DEL R571
R570
R570
*1K/F_4
*1K/F_4
+1.05V
Disable ITP
PROJECT : KL1
Quanta Computer In
c
Rev
PROJECT : KL1
Quanta Computer Inc
Rev
PROJECT : KL1
Quanta Computer Inc
Rev
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
CLOCK GE
N
ERATOR
Friday, March 06, 2009
CLOCK GENERATOR
Friday, March 06, 2009
CLOCK GENERATOR
Friday, March 06, 2009
A1A
A1A
A1A
Date:
Date:
Date:
Sheet
Sheet
Sheet
3
3
3
of
of
of
43
43
43
1
2
3
4
5
6
7
8
5
4
3
2
1
04
(3,5,6,7,9,10,23,26,28,38)
+1.05V
(5,38,41)
VCC_CORE
U26A
U26A
(6)
H_A#[35:3]
TP15
TP15
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
J4
H1
H
_ADS# (6)
H_BNR# (6)
H_BPRI# (6)
H
_DEFER# (6)
H
_DRDY# (6)
H_DBSY# (6)
A[3]#
ADS#
L5
BNR#
E2
A[4]#
L4
BPRI#
G5
A[5]#
(6)
H_D#[63:0]
H_D#[63:0]
U26B
U26B
K5
A[6]#
M3
H5
H_D#0
H_D#1
E22
D[32]#
Y22
D[33]#
AB24
D[34]#
V24
D[35]#
V26
D[36]#
V23
D[37]#
T22
D[38]#
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
A[7]#
DEFER#
D[0]#
N2
F21
F24
A[8]#
DRDY#
D[1]#
H_D#2
H_D#3
J1
DBSY#
E1
E26
A[9]#
D[2]#
N3
G22
A[10]#
D[3]#
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
P5
BR0#
F1
F23
A[11]#
HBREQ#0 (6)
D[4]#
D
D
P2
G25
A[12]#
D[5]#
L2
D20
H_IERR#
R144
R144
56.2/F_4
56.2/F_4
E25
U25
+1.05V
A[13]#
IERR#
D[6]#
P4
B3
E23
U23
H_INIT# (23)
A[14]#
INIT#
D[7]#
D[39]#
P1
K24
D[40]#
Y25
D[41]#
W22
D[42]#
Y23
D[43]#
W24
D[44]#
W25
D[45]#
AA23
D[46]#
AA24
D[47]#
AB25
A[15]#
D[8]#
R1
LOCK#
H4
G24
A[16]#
H_LOCK# (6)
D[9]#
M1
J24
(6)
H_ADSTB#0
ADSTB[0]#
H_CPURST# (6)
D[10]#
RESET#
C1
RS[0]#
F3
RS[1]#
F4
RS[2]#
G3
J23
(6)
H_REQ#[4:0]
D[11]#
H_REQ#0
K3
H_RS#0
H_D#12
H_D#13
H_D#14
H_D#15
H22
H_D#44
H_D#45
H_D#46
H_D#47
REQ[0]#
D[12]#
H_REQ#1
H_REQ#2
H_RS#1
H_RS#2
H2
F26
REQ[1]#
D[13]#
K2
K22
H_RS#[2:0] (6)
REQ[2]#
D[14]#
H_REQ#3
H_REQ#4
J3
TRDY#
G2
H23
REQ[3]#
H_TRDY# (6)
D[15]#
L1
J26
DSTBN[2]#
Y26
REQ[4]#
(6)
H_DSTBN#0
DSTBN[0]#
H
_DSTBN#2 (6)
H_A#[35:3]
G6
H26
AA26
H
_HIT# (6)
H_HITM# (6)
(6)
H_DSTBP#0
H
_DSTBP#2 (6)
H_DINV#2 (6)
HIT#
DSTBP[0]#
DSTBP[2]#
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
Y2
E4
H25
U22
(6)
H_DINV#0
A[17]#
HITM#
DINV[0]#
DINV[2]#
U5
A[18]#
ITP_BPM#0
ITP_BPM#1
H_D#[63:0]
H_D#[63:0]
R3
BPM[0]#
AD4
BPM[1]#
AD3
BPM[2]#
A[19]#
TP3
TP3
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#48
H_D#49
H_D#50
H_D#51
W6
N22
D[48]#
AE24
D[49]#
A[20]#
TP2
TP2
D[16]#
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
U4
AD1
K25
AD24
TP4
TP4
A[21]#
D[17]#
Y5
AC4
P26
D[50]#
AA21
D[51]#
AB22
D[52]#
AB21
D[53]#
AC26
D[54]#
AD20
D[55]#
AE22
D[56]#
AF23
D[57]#
AC25
D[58]#
AE21
D[59]#
AD21
TP6
TP6
A[22]#
BPM[3]#
D[18]#
U1
PRDY#
AC2
PREQ#
AC1
R23
TP5
TP5
A[23]#
D[19]#
H_D#52
H_D#53
H_D#54
H_D#55
R4
L23
TP7
TP7
A[24]#
D[20]#
ITP_TCK
ITP_TDO
T5
TCK
AC5
TDI
AA6
TDO
M24
A[25]#
D[21]#
ITP_TDI
T3
L22
A[26]#
D[22]#
W2
AB3
M23
A[27]#
D[23]#
W5
AB5
ITP_TMS
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D
#3
1
P25
H_D#56
H_D#57
H_D#58
H_D#59
A[28]#
TMS
D[24]#
ITP_TRST#
Y4
TRST#
AB6
P23
A[29]#
D[25]#
U2
DBR#
C20
P22
A[30]#
SYS_RST# (25)
D[26]#
V4
T24
A[31]#
D[27]#
H_D#60
H_D#61
H_D#62
H_D#63
W3
R24
D[60]#
AC22
D[61]#
AD23
D[62]#
A[32]#
D[28]#
THERMAL
THERMAL
AA4
L25
A[33]#
D[29]#
C
AB2
+1.05V
T25
AF22
C
A[34]#
D[30]#
H_PROCHO
T#_
R
AA3
D21
R143
R143
68_4
68_4
N25
AC23
+1.05V
A[35]#
PROCHOT#
D[31]#
D[63]#
V1
THERMDA
A24
THERMDC
B25
L26
DSTBN[3]#
AE25
(6)
H_ADSTB#1
ADSTB[1]#
H
_THERMDA (5)
(6)
H_DSTBN#1
DSTBN[1]#
H
_DSTBN#3 (6)
R418
1K/F_4
M26
DSTBP[3]#
AF24
H_THERMDC (5)
(6)
H_DSTBP#1
DSTBP[1]#
H
_DSTBP#3 (6)
A6
N24
DINV[3]#
AC20
(23)
H_A20M#
A20M#
(6)
H_DINV#1
DINV[1]#
H_DINV#3 (6)
A5
C7
(23)
H_FERR#
PM_THRMTRIP# (7,23)
FERR#
THERMTRIP#
H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7
COMP0
COMP1
COMP2
COMP3
C4
AD26
COMP[0]
R26
COMP[1]
U26
COMP[2]
AA1
COMP[3]
Y1
R431
R431
27.4/F_4
27.4/F_4
(23)
H_IGNNE#
IGNNE#
GTLREF
C23
MISC
MISC
R429
R429
54.9/F_4
54.9/F_4
TP31
TP31
TEST1
H CLK
H CLK
R415
2K/F_4
R40
R40
27.4/F_4
27.4/F_4
D5
D25
(23)
H_STPCLK#
STPCLK#
TEST2
R43
R43
54.9/F_4
54.9/F_4
C6
C24
(23)
H_INTR
LINT0
TP18
TP18
TEST3
B4
BCLK[0]
A22
BCLK[1]
AF26
(23)
H_NMI
LINT1
CLK_CPU_BCLK (3)
TP81
TP81
TEST4
A3
A21
AF1
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
(23)
H_SMI#
CLK_CPU_BCLK# (3)
TP82
TP82
H_DPRSTP# (7,23,41)
SMI#
TEST5
A26
TP83
TP83
H
_DPSLP# (23)
TEST6
Quard Core Only
Quard Core Only
C3
TP34
TP34
TEST7
H_DPWR# (6)
H_PWRGD (23)
F6
RSVD[06]
D2
B22
PWRGOOD
D6
SLP#
D7
TP29
TP29
TDI_1/RSV
TP39
TP39
(3,7)
CPU_BSEL0
BSEL[0]
D3
B23
TP40
TP40
TDO_2/RSV
(3,7)
CPU_BSEL1
BSEL[1]
H
_CPUSLP# (6)
PM_PSI# (41)
C21
AE6
(3,7)
CPU_BSEL2
BSEL[2]
PSI#
ITP_BPM1#0
ITP_BPM1#1
ITP_BPM1#2
N5
TP12
TP12
M4
BMP_1#[0]/RSV
Penryn
Penryn
TP13
TP13
BMP_1#[1]/RSV
B2
TP33
TP33
BMP_1#[2]/RSV
AE8
BMP_1#[3]/VSS
D8
F8
DCLKPH_1/VSS
ACLKPH_1/VSS
H_GTLREF2
H_THERMDA2
H_THERMDC2
D22
TP16
TP16
GTLREF_2/RSV
CPU_TEST1
T2
R92
R92
*
1K/F_4@NC
*1K/F_4@NC
TP11
TP11
THRMDA_1/RSV
V3
TP8
TP8
THRMDC_1/RSV
AA8
HFPLL_1/VSS
AC8
H_PROCHOT#_R
CPU_TEST2
R93
R93
*
1K/F_4@NC
*1K/F_4@NC
SPARE_1[4]/VSS
AA7
VCC_CORE
BR1#/VCC
B
B
Penryn
Penryn
2
H_PROCHOT# (41)
Q4
*2N7002@NC
Populate ITP700Flex for bringup
+1.05V
ITP_TDI
ITP_TMS
R41
R41
54.9/F_4
54.9/F_4
R34
R34
54.9/F_4
54.9/F_4
ITP_TDO
ITP_BPM#5
R37
R37
*54.9/F_4@NC
*54.9/F_4@NC
R29
R29
54.9/F_4
54.9/F_4
A
H_CPURST#
R459
R459
*51/F_4@NC
*51/F_4@NC
A
ITP_TCK
R31
R31
54.9/F_4
54.9/F_4
PROJECT : KL1
Quanta Computer In
c
Rev
PROJECT : KL1
Quanta Computer Inc
Rev
PROJECT : KL1
Quanta Computer Inc
Rev
ITP_TRST#
R35
R35
54.9/F_4
54.9/F_4
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
Penryn 1/2
Penryn 1/2
Penryn 1/2
A1A
A1A
A1A
Date:
Date:
Date:
Friday, March 06, 2009
Friday, March 06, 2009
Friday, March 06, 2009
Sheet
Sheet
Sheet
4
4
4
of
of
of
43
43
43
5
4
3
2
1
5
4
3
2
1
05
(3,7,10,11,12,13,15,16,20,21,22,23,24,25,26,27,28,29,30,31,33,34,35,36,37,38,40,41)
+3V
(3,4,6,7,9,10,23,26,28,38)
+1.05V
(10,23,24,26,28,31,33,36,38)
+1.5V
VCC_CORE
VCC_CORE
(4,38,41)
VCC_CORE
U26C
U26C
A7
VCC[068]
AB20
VCC[069]
AB7
VCC[070]
AC7
VCC[071]
AC9
VCC[072]
AC12
VCC[073]
AC13
VCC[074]
AC15
VCC[075]
AC17
VCC[076]
AC18
VCC[077]
AD7
VCC[078]
AD9
VCC[079]
AD10
VCC[080]
AD12
VCC[081]
AD14
VCC[082]
AD15
VCC[083]
AD17
VCC[084]
AD18
VCC[085]
AE9
VCC[086]
AE10
VCC[087]
AE12
VCC[088]
AE13
VCC[089]
AE15
VCC[090]
AE17
VCC[091]
AE18
VCC[092]
AE20
VCC[093]
AF9
VCC[094]
AF10
VCC[095]
AF12
VCC[096]
AF14
VCC[097]
AF15
VCC[098]
AF17
VCC[099]
AF18
VCC[100]
AF20
VCC[001]
A9
VCC_CORE
VCC[002]
A10
VCC[003]
U26D
U26D
A12
VCC[004]
A13
A4
VSS[082]
P6
VCC[005]
VSS[001]
A15
A8
VSS[083]
P21
VSS[084]
P24
VSS[085]
R2
VSS[086]
R5
VSS[087]
R22
VSS[088]
R25
VSS[089]
T1
VSS[090]
T4
VSS[091]
T23
VSS[092]
T26
VSS[093]
U3
VSS[094]
U6
VSS[095]
U21
VSS[096]
U24
VSS[097]
V2
VSS[098]
V5
VSS[099]
V22
VSS[100]
V25
VSS[101]
W1
VSS[102]
W4
VSS[103]
W23
VSS[104]
W26
VSS[105]
Y3
VSS[107]
Y21
VSS[108]
Y24
VSS[109]
AA2
VSS[110]
AA5
VSS[112]
AA11
VSS[113]
AA14
VSS[114]
AA16
VSS[115]
AA19
VSS[116]
AA22
VSS[117]
AA25
VSS[118]
AB1
VSS[119]
AB4
VSS[120]
AB8
VSS[121]
AB11
VSS[122]
AB13
VSS[123]
AB16
VSS[124]
AB19
VSS[125]
AB23
VSS[126]
AB26
VSS[127]
AC3
VSS[128]
AC6
VSS[130]
AC11
VSS[131]
AC14
VSS[132]
AC16
VSS[133]
AC19
VSS[134]
AC21
VSS[135]
AC24
VSS[136]
AD2
VSS[137]
AD5
VSS[138]
AD8
VSS[139]
AD11
VSS[140]
AD13
VSS[141]
AD16
VSS[142]
AD19
VSS[143]
AD22
VSS[144]
AD25
VSS[145]
AE1
VSS[146]
AE4
VCC[006]
VSS[002]
A17
A11
VCC[007]
VSS[003]
C621
10U/6.3V_8
C90
10U/6.3V_8
C548
10U/6.3V_8
C339
10U/6.3V_8
A18
A14
VCC[008]
VSS[004]
A20
A16
VCC[009]
VSS[005]
B7
A19
D
D
VCC[010]
VSS[006]
B9
A23
VCC[011]
VSS[007]
B10
AF2
VCC[012]
VSS[008]
B12
B6
VCC[013]
VSS[009]
C91
10U/6.3V_8
C212
10U/6.3V_8
C87
10U/6.3V_8
C86
10U/6.3V_8
B14
B8
VCC[014]
VSS[010]
B15
B11
VCC[015]
VSS[011]
B17
B13
VCC[016]
VSS[012]
B18
B16
VCC[017]
VSS[013]
B20
B19
VCC[018]
VSS[014]
C9
B21
VCC[019]
VSS[015]
C620
10U/6.3V_8
C207
10U/6.3V_8
C211
10U/6.3V_8
C210
10U/6.3V_8
C10
B24
VCC[020]
VSS[016]
C12
C5
VCC[021]
VSS[017]
C13
C8
VCC[022]
VSS[018]
C15
C11
VCC[023]
VSS[019]
C17
C14
VCC[024]
VSS[020]
C18
C16
VCC[025]
VSS[021]
C568
10U/6.3V_8
C569
10U/6.3V_8
C206
10U/6.3V_8
C566
10U/6.3V_8
D9
C19
VCC[026]
VSS[022]
D10
C2
VCC[027]
VSS[023]
D12
C22
VCC[028]
VSS[024]
D14
C25
VSS[106]
Y6
VCC[029]
VSS[025]
D15
D1
VCC[030]
VSS[026]
D17
D4
VCC[031]
VSS[027]
C622
10U/6.3V_8
C623
10U/6.3V_8
C340
10U/6.3V_8
C547
10U/6.3V_8
D18
VCC[032]
+1.05V
E7
D11
VCC[033]
VSS[029]
E9
D13
VCC[034]
VSS[030]
E10
VCCP[01]
G21
VCCP[02]
V6
D16
VCC[035]
VSS[031]
E12
D19
VCC[036]
VSS[032]
E13
VCCP[03]
J6
VCCP[04]
K6
VCCP[05]
M6
VCCP[06]
J21
VCCP[07]
K21
VCCP[08]
M21
VCCP[09]
N21
VCCP[10]
N6
VCCP[11]
R21
VCCP[12]
R6
VCCP[13]
T21
VCCP[14]
T6
VCCP[15]
V21
VCCP[16]
D23
VCC[037]
VSS[033]
C571
10U/6.3V_8
C570
10U/6.3V_8
C93
10U/6.3V_8
C89
10U/6.3V_8
E15
D26
VCC[038]
VSS[034]
C100
330u_2.5V_7343
C100
330u_2.5V_7343
E17
+
+
E3
VCC[039]
VSS[035]
E18
E6
VCC[040]
VSS[036]
C
C
E20
E8
VCC[041]
VSS[037]
F7
E11
VCC[042]
VSS[038]
+1.5V
F9
E14
VCC[043]
VSS[039]
C92
10U/6.3V_8
C88
10U/6.3V_8
C338
10U/6.3V_8
C337
10U/6.3V_8
F10
E16
VCC[044]
VSS[040]
F12
E19
VCC[045]
VSS[041]
F14
E21
VCC[046]
VSS[042]
F15
E24
VCC[047]
VSS[043]
F17
F5
VCC[048]
VSS[044]
C228
.01U/16V_4
C230
10U/6.3V_8
F18
VCC[049]
C213
10U/6.3V_8
C209
10U/6.3V_8
C567
10U/6.3V_8
C208
10U/6.3V_8
F20
W21
F11
VCC[050]
VSS[046]
F13
VSS[047]
AA9
VCCA[01]
B26
F16
VCC[052]
VSS[048]
AA10
VCCA[02]
C26
F19
VCC[053]
VSS[049]
AA12
F2
VCC[054]
VSS[050]
AA13
VID[0]
AD6
VID[1]
AF5
VID[2]
AE5
VID[3]
AF4
VID[4]
AE3
VID[5]
AF3
VID[6]
AE2
F22
C
PU_VID0
(41)
+1.05V
VCC[055]
VSS[051]
AA15
F25
C
PU_VID1
(41)
VCC[056]
VSS[052]
AA17
G4
VCC[057]
C
PU_VID2
(41)
VSS[053]
AA18
G1
C
PU_VID3
(41)
VCC[058]
VSS[054]
AA20
G23
C
PU_VID4
(41)
VCC[059]
VSS[055]
AB9
G26
VCC[060]
C
PU_VID5
(41)
VSS[056]
C132
.1U/10V_4
C94
.1U/10V_4
C185
.1U/10V_4
C136
.1U/10V_4
C196
.1U/10V_4
C96
.1U/10V_4
AC10
H3
VCC[061]
CPU_VID6
(41)
VSS[057]
AB10
H6
VCC[062]
VSS[058]
AB12
H21
VCC[063]
VSS[059]
AB14
VCCSENSE
AF7
H24
VCC[064]
VCCSENSE
(41)
VSS[060]
AB15
J2
VCC[065]
VSS[061]
AB17
J5
VCC[066]
VSS[062]
AB18
AE7
J22
VSSSENSE (41)
VCC[067]
VSSSENSE
VSS[063]
J25
VSS[064]
Penryn
Penryn
K1
VSS[065]
.
.
K4
VSS[066]
R20
100/F_4
R19
100/F_4
K23
AE11
VSS[067]
VSS[148]
B
B
K26
VSS[149]
AE14
VSS[150]
AE16
VSS[068]
L3
VSS[069]
L6
AE19
VSS[070]
VSS[151]
+3V
L21
AE23
VSS[071]
VSS[152]
L24
VSS[153]
AE26
VCC_CORE
VSS[072]
M2
VSS[154]
A2
VSS[073]
M5
AF6
VSS[074]
VSS[155]
Place within 2000 mils
M22
AF8
VSS[075]
VSS[156]
M25
VSS[157]
AF11
+3V
VSS[076]
N1
VSS[158]
AF13
VSS[077]
R461
0_4
N4
AF16
VSS[078]
VSS[159]
25 mils
N23
AF19
VSS[079]
VSS[160]
N26
VSS[161]
AF21
VSS[080]
Q21
Q21
LM86VCC
P3
VSS[162]
A25
VSS[081]
VSS[163]
AF25
3
1
(34,35,36)
MB_CLK
R492
10K/F_4
R491
10K/F_4
R483
10K/F_4
R458
*10K/F_4
C617
.1U/10V_4
Penryn
Penryn
.
.
2N7002
2N7002
U30
U30
8
VCC
1
DXP
2
DXN
3
GND
(16)
MBCLK2
SCLK
H_THERMDA
(4)
7
(16)
MBDATA2
SDA
C615
100P/50V_4
+3V
6
ALERT#
Q17
Q17
4
5
H_THERMDC
(4)
OVERT#
3
1
(34,35,36)
MB_DATA
G780P81U
G780P81U
A
A
2N7002
2N7002
ADDRESS: 98H
R467
R467
*0_6
*0_6
(25)
PM_THRM#
+3V
Q16
Q16
PROJECT : KL1
Quanta Computer Inc
.
Rev
PROJECT : KL1
Quanta Computer Inc.
Rev
PROJECT : KL1
Quanta Computer Inc.
Rev
SYS_SHDN#
SYS_SHDN-1#
3
1
(40,41)
SYS_SHDN#
2N7002
2N7002
Size
Size
Size
Document Number
Document Number
Document Number
2
1
VGA_OVT# (16)
D12
D12
Custom
Custom
Custom
Penryn & T
H
Monitor 2/2
Penryn & TH Monitor 2/2
Penryn & TH Monitor 2/2
A1A
A1A
A1A
*RB501V-40
*RB501V-40
Date:
Date:
Date:
Friday, March 06, 2009
Friday, March 06, 2009
Friday, March 06, 2009
Sheet
Sheet
Sheet
5
5
5
of
of
of
43
43
43
5
4
3
2
1
Plik z chomika:
kordex35
Inne pliki z tego folderu:
da0ql6mb8d0-d-silk-lisa2.rar
(5955 KB)
Cam nang sua chua T40-T43_upload.pdf
(1982 KB)
C462MLA-3781PIHLVX.pdf
(1019 KB)
CASTW_IBM_T41.rar
(1425 KB)
B465.pdf
(1673 KB)
Inne foldery tego chomika:
EEprom_lokalizacja_IBM
IBM ThinkPad R61i Recovery
IBM ThinkPad T42 T42P R51 Recovery
IBM ThinkPad T42 T42P R51 Recovery(1)
IBM ThinkPad T60 T60P Recovery
Zgłoś jeśli
naruszono regulamin